int64.org

Instruction sets

AMD taking a page from Intel’s marketing

AMD’s new Phe­nom proces­sor comes with a new in­struc­tion set called SSE4a. For a while I’ve been run­ning under the as­sump­tion that this also meant they caught up and added sup­port for SSSE3, and that SSE4a was sim­ply SSE4 with a few new in­struc­tions added on. This was pretty cool to me, be­cause SSE4 has some nice in­struc­tions like DPPS that I was look­ing for­ward to using.

Turns out it’s not so – SSE4a doesn’t in­clude any of the 54 new in­struc­tions in SSE4. What it does add is 8 new in­struc­tions, one of which is sim­i­lar to but in­com­pat­i­ble with a SSE4 in­struc­tion. SSE4 aside, the Phe­nom still doesn’t even have sup­port for SSSE3.

Al­though they have im­proved quite a bit re­cently, Intel is well known for using anti–con­sumer tac­tics in mar­ket­ing in the past. The "GHz myth" they started will un­doubt­edly be fresh in the minds of weary techies for years to come. I never ex­pected AMD to sink to such un­der­handed mar­ket­ing, but it ap­pears they have: SSE4a is named to be noth­ing more than con­fus­ing to po­ten­tial con­sumers.